1. Field of the Invention
The present invention is directed in general to the field of semiconductor devices. In one aspect, the present invention relates to high-performance integrated circuit capacitor structures.
2. Description of the Related Art
When integrated circuits are formed on semiconductor substrates for use in high voltage applications, the integrated circuit components must be designed to tolerate the high currents and voltages that are present in power applications. For example, integrated circuit capacitors should be able to handle high voltages (e.g., on the order of approximately 40 volts). When an integrated circuit capacitor design did not meet the voltage requirement, one solution is to stack two or more capacitor in series. However, this “series stacking” approach dramatically reduces the capacitance density. Other attempts to design high voltage capacitors have formed large planar conductor plates from one or more metal layers formed over the substrate, but these designs occupy a large region of valuable silicon real estate, resulting in a capacitance density of approximately 0.28-0.3 fF/um2. Other attempts to design integrated circuit capacitors have fabricated DRAM trench capacitors, but there are performance related problems with such designs, particularly when implemented as floating capacitor structures.
Accordingly, a need exists for an integrated circuit manufacturing process for fabricating high voltage capacitor structures which occupy a minimal amount of real estate and provide the required voltage while avoiding the performance-related problems associated with conventional solutions. There is also a need for an improved process for manufacturing integrated circuit capacitors with high capacitance density that overcome the layout and design penalties associated with capacitors that are formed from large planar conductor plates. In addition, there is a need for improved semiconductor processes and devices to overcome the problems in the art, such as outlined above. Further limitations and disadvantages of conventional processes and technologies will become apparent to one of skill in the art after reviewing the remainder of the present application with reference to the drawings and detailed description which follow.
It will be appreciated that for simplicity and clarity of illustration, elements illustrated in the drawings have not necessarily been drawn to scale. For example, the dimensions of some of the elements are exaggerated relative to other elements for purposes of promoting and improving clarity and understanding. Further, where considered appropriate, reference numerals have been repeated among the drawings to represent corresponding or analogous elements.